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Training in: Semiconductor memory device and chip design and modelling, device and chip processing, electrical characterization.

The > $100bn pa memory market is dominated by DRAM and flash. DRAM is fast with high endurance and low switching energy, but is also volatile and needs to be continually refreshed. In contrast, flash is non-volatile and cheap, but intrinsically slow and low endurance. Ideally, a memory should combine all the advantages of DRAM and flash, without any of the disadvantages, i.e. be fast with low switching energy, non-volatile, high endurance and low-cost; a so-called ‘universal memory’.

We are exploiting the extraordinary properties of III-Sb’s to develop a candidate universal memory technology that is expected to out-perform DRAM with the additional advantage of non-volatility. The memories uses the huge band offsets between InAs/AlSb in a triple-barrier resonant tunneling structure to solve the universal memory paradox of robust states that are easily changed.

The research will focus on the scaling of the technology from the current status of single bit devices and small arrays (4 and 64 bit) at the 20 micron node towards 1 Mbit arrays with scaled devices at <100 nm node. The researcher will model, design process and test (large arrays of) scaled single devices. Full facilities are available for device and circuit modelling, processing by photo- and e-beam lithography and electrical testing.

Environment

Institution: Lancaster University a top 10 university, according to national newspaper league tables, and is the Times and Sunday Times International University of the Year 2020.
Institute/Laboratory: The Department of Physics is a vibrant research environment with ~120 research staff and >130 PhD students. It was ranked 2nd for internationally leading research papers in the most recent UK research evaluation, and is 4th in the UK for undergraduate physics (The Guardian).
Location/City: The historic city of Lancaster is located in the North West of England, close to the beautiful Lake District. It has excellent road and rail connections, with direct trains to Manchester airport.

Requirements

We seek an excellent, open-minded and team-spirited PhD candidate with:
Graduation: a Physics or Electronic Engineering degree.
Post-graduation: successful candidates will have a Masters degree in a closely-related scientific field (including an integrated Masters MPhys, MSci, MEng etc.). Previous experience in a research environment involving solid-state physics, electronics or similar will be positively considered.
Other: The successful candidate should have good knowledge of and interest in both experimental and theoretical work.

How to Apply

Candidates can apply to a maximum of four different ESR positions in the network using the links below. Applications must include the following documents:
  1. An internal application form listing your academic and job records (.docx template available here).
  2. A free format CV (pdf format max 2 Mb)
  3. Official documentation such as degree and grades certificates will be required at a later stage.
The deadline for application is 31st January 2021.
Attempts to apply to more than four positions using different registration profiles will invalidate your candidature.